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ESP-IDF Firmware
Firmware architecture and call graph
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#include <stdint.h>#include <stdbool.h>#include "dsp_err.h"#include "esp_idf_version.h"#include <x86intrin.h>Go to the source code of this file.
Macros | |
| #define | dsp_get_cpu_cycle_count __rdtsc |
Functions | |
| bool | dsp_is_power_of_two (int x) |
| check power of two The function check if the argument is power of 2. The implementation use ANSI C and could be compiled and run on any platform | |
| int | dsp_power_of_two (int x) |
| Power of two The function return power of 2 for values 2^N. The implementation use ANSI C and could be compiled and run on any platform. | |
| esp_err_t | tie_log (int n_regs,...) |
| Logginng for esp32s3 TIE core Registers covered q0 to q7, ACCX and SAR_BYTE. | |
| #define dsp_get_cpu_cycle_count __rdtsc |
Definition at line 88 of file dsp_common.h.
Referenced by draw_3d_image_task(), draw_3d_image_task(), kalman_filter_task(), kalman_filter_task(), kalman_filter_task(), and kalman_filter_task().
| bool dsp_is_power_of_two | ( | int | x | ) |
check power of two The function check if the argument is power of 2. The implementation use ANSI C and could be compiled and run on any platform
Definition at line 17 of file dsps_pwroftwo.cpp.
References x.
Referenced by dsps_bit_rev4r_direct_fc32_ansi(), dsps_bit_rev_fc32_ansi(), dsps_bit_rev_sc16_ansi(), dsps_cplx2reC_fc32_ansi(), dsps_cplx2reC_sc16(), dsps_cplx_gen_freq_get(), dsps_cplx_gen_init(), dsps_cplx_gen_phase_get(), dsps_fft2r_fc32_ansi_(), dsps_fft2r_sc16_ansi_(), dsps_gen_bitrev2r_table(), dsps_gen_bitrev4r_table(), dsps_gen_w_r2_fc32(), dsps_gen_w_r2_sc16(), dsps_sfdr_f32(), and dsps_snr_f32().
| int dsp_power_of_two | ( | int | x | ) |
Power of two The function return power of 2 for values 2^N. The implementation use ANSI C and could be compiled and run on any platform.
Definition at line 22 of file dsps_pwroftwo.cpp.
References x.
Referenced by dsps_bit_rev4r_direct_fc32_ansi(), dsps_cplx2real_sc16_ansi(), dsps_fft2r_init_fc32(), dsps_fft4r_fc32_ansi_(), dsps_fft4r_init_fc32(), and dsps_gen_bitrev4r_table().
| esp_err_t tie_log | ( | int | n_regs, |
| ... ) |
Logginng for esp32s3 TIE core Registers covered q0 to q7, ACCX and SAR_BYTE.
| n_regs | number of registers to be logged at once |
| ... | register codes 0, 1, 2, 3, 4, 5, 6, 7, 'a', 's' |