ESP-IDF Firmware
Firmware architecture and call graph
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dsps_fft2r_platform.h
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1#ifndef _dsps_fft2r_platform_H_
2#define _dsps_fft2r_platform_H_
3
4#include "sdkconfig.h"
5
6#ifdef __XTENSA__
7#include <xtensa/config/core-isa.h>
8#include <xtensa/config/core-matmap.h>
9
10
11#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
12
13#define dsps_fft2r_fc32_ae32_enabled 1
14
15#endif //
16
17#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
18
19#define dsps_fft2r_sc16_ae32_enabled 1
20
21#endif //
22
23#if (XCHAL_HAVE_LOOPS == 1)
24
25#define dsps_bit_rev_lookup_fc32_ae32_enabled 1
26
27#endif //
28#endif // __XTENSA__
29
30#if CONFIG_IDF_TARGET_ESP32S3
31#define dsps_fft2r_fc32_aes3_enabled 1
32#define dsps_fft2r_sc16_aes3_enabled 1
33#endif
34#if CONFIG_IDF_TARGET_ESP32P4
35#ifdef CONFIG_DSP_OPTIMIZED
36#define dsps_fft2r_fc32_arp4_enabled 1
37#define dsps_fft2r_sc16_arp4_enabled 1
38#else
39#define dsps_fft2r_fc32_arp4_enabled 0
40#define dsps_fft2r_sc16_arp4_enabled 0
41#endif // CONFIG_DSP_OPTIMIZED
42#endif
43
44#endif // _dsps_fft2r_platform_H_